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ISL97635A
TABLE 1. PROTECTIONS TABLE
DETECTION
VOUT
CASE
1
FAILURE MODE
CH0 Short Circuit
MODE
Upper
FAILED CHANNEL ACTION
CH0 ON and burns power
GOOD CHANNELS ACTION
CH1 through CH5 Normal
REGULATED BY
Highest VF of CH1
Over-Temperature
Protection limit
(OTP) not
triggered and
VIIN0 < VSC
through CH5
2
CH0 Short Circuit
Upper OTP
CH0 goes off until chip cooled and
Same as CH0
Highest VF of CH1
triggered but VIN0 then comes back on with current
through CH5
< VSC
reduced to 76%. Further OTP
triggers result in reduction to 53%,
then 30%. Thermal event reported
in Fault/Status Register.
3
CH0 Short Circuit
Upper OTP not
CH0 doubled after 6ms time-out.
CH1 through CH5 Normal
Highest VF of CH1
triggered but
VIIN0 > VSC
Time-out reduced to 420μs if above
lower OTP limit
through CH5
4
CH0 Open Circuit
with infinite
Upper OTP not
triggered and
VOUT will ramp to OVP. CH0 will
time-out after 6ms (800μs if above
CH1 through CH5 Normal
Highest VF of CH1
through CH5
resistance
VIIN0 < VSC
lower OTP limit) and switch off.
VOUT will drop to normal level.
5
CH0 LED Open
Circuit but has
Upper OTP not
triggered and
CH0 remains ON and has highest
VF, thus VOUT increases
CH1 through CH5 ON, Q1 through
Q5 burn power
VF of CH0
paralleled Zener
VIIN0 < VSC
6
CH0 LED Open
Upper OTP
CH0 goes off until chip cooled and
Same as CH0
VF of CH0
Circuit but has
paralleled Zener
triggered but
VIIN0 < VSC
then comes back on with current
reduced to 76%. Further OTP
triggers result in reduction to 53%,
then 30%. Thermal event reported
in Fault/Status Register.
7
CH0 LED Open
Upper OTP not
CH0 OFF
CH1 through CH5 Normal
Highest VF of CH1
Circuit but has
paralleled Zener
triggered but
VIIN0 > VSC
through CH5
Upper OTP not
CH0 remains ON and has highest
VOUT increases then CH-X
VF of CH0
triggered but VIINx VF, thus VOUT increases.
> VSC
switches OFF. This is an unwanted
shut off and can be prevented by
setting OVP and/or VSC at an
appropriate level.
8
Channel-to-Channel Lower OTP
Any channel at below 50% of the target current will fault out after 400μs.
Highest VF of CH0
Δ VF too high
triggered but VIINx Remaining channels driven with normal current.
< VSC
through CH5
9
Channel-to-Channel Upper OTP
All channels switched off until chip cooled and then comes back on with
Highest VF of CH0
Δ VF too high
triggered but VIINx current reduced to 76%. Further OTP triggers result in reduction to 53%, through CH5
< VSC
then 30%. Thermal event reported in Fault/Status Register.
10
Output LED stack
voltage too high
VOUT > VOVP
Driven with normal current. Any channel that is below 50% of the target
current will time-out after 6ms.
Highest VF of CH0
through CH5
11
VOUT/LX shorted to LX current and
Fault switch disabled and system shutdown until fault goes away, VOUT
GND
timing are
monitored.
OVP pin
monitored for
excursions below
20% of OVP
threshold
16
is checked at startup with a low current from LX to check for presence of
short before the fault switch is enabled.
FN6564.2
December 22, 2008
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